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How does a Semiconductor Memory store DATA? [Part 1 DRAM]

Viewed : 47 times,  2022-01-10 08:13:42

What is in this smartphone replacing our memory and notebooks? It's a semiconductor memory.

 

Changes in knowledge storage media

The pace of civilization’s development is closely related to how portable and accessible tools for recording knowledge are. From this standpoint, one of the important factors for the rapid increase of human knowledge is the invention of paper. Comparing engraving on stones or woodblocks to writing on paper, it is easy to understand that paper is a very convenient medium for recording knowledge. As printing technology capable of recording a large amount of text all at once was developed, going one step further from writing directly on paper, the delivery and development speed of civilization knowledge accelerated.

As times change, a different level of knowledge storage media has now appeared in front of us. It is a memory semiconductor. Smartphones are tools that can easily access the role of memory semiconductors in our daily lives. This electronic device, which has functions of not only making a call but also storing letters, photos, sounds, and videos, penetrated our daily lives and changed everything 10 years after its appearance. For example, in the past, the phone numbers of close relatives were memorized or written down in notebooks. But now, we hardly memorize phone numbers, and we don’t even write them down in our notebooks. Using a smartphone makes it easy to remember and call to mind everything.

Owing to this convenience, we now don’t need to memorize or record phone numbers separately. What is in this smartphone replacing our memory and notebooks? It is the semiconductor. More precisely, it's a semiconductor memory among semiconductors.

 

Types of semiconductor devices

Semiconductors can be largely divided into memory semiconductors and Logic semiconductors. DRAM, Flash memory, etc., are memory semiconductors, and CPU, AP, and GPU, etc. are placed in the logic semiconductor category. When Korea is called a powerful nation of semiconductors, that semiconductor refers to the memory semiconductor. Korea takes the first place in market share in the fields of Dynamic Random Access Memory(DRAM) and NAND Flash Memory, which are representative memory semiconductors.

Storing digital data means that it can create, maintain, and distinguish between two states of 1 and 0. For example, if you create a space to store charges in a storing unit cell, and define 1 and 0 separately depending on the state where the charges are stored, one cell will be the space to store 1 or 0. The important thing at this time is that the stored charge should be maintained and the stored state should be distinguishable.

 

Storing principle of DRAM

DRAM stores 1 bit using a single transistor and capacitor. In other words, it opens the door(transistor) and stores data in the warehouse(capacitor). Because applied voltage to the capacitor varies according to stored charge, the stored charge in the capacitor can be divided into 1 and 0. When reading stored data, a voltage difference is detected and amplified through a sense amplifier to distinguish 1 and 0.

Figure 1. a) is a unit cell of DRAM. When a voltage is applied voltage on the word line and the transistor is turned on, the charges are stored in the capacitor through the bit line. At this time, when a high voltage(Vdd) is applied to the bit line, DATA 1 is stored in the capacitor, and when a low voltage(Vss (0 V)) is applied, DATA 0 is stored. To store data accurately, a higher capacitance is better, so maintaining capacitance even in a narrow area is one of the main technologies of DRAM semiconductors.

 

Figure 1. DRAM Unit Cell. a) DRAM cell is constituted of a single transistor and capacitor. b) Data 1 is a state with High voltage (Vdd) applied in the storage node. c) Data 0 is a state with low voltage (Vss (0 V)) applied in the storage node.

Figure 1. DRAM Unit Cell. a) DRAM cell is constituted of a single transistor and capacitor. b) Data 1 is a state with High voltage (Vdd) applied in the storage node. c) Data 0 is a state with low voltage (Vss (0 V)) applied in the storage node.

 

When I first participated in DRAM development in the 1980s, DRAM cell transistors and capacitors were both planar structures. That is, the substrate surface of the silicon wafer was used as a channel of cell transistor, and similarly, the doped substrate surface of the silicon wafer was used as a storage node of the capacitor. Stable device characteristics can be obtained by using the surface of a single crystal silicon wafer, which was common sense at that time.

However, currently, neither the transistor nor the capacitor is a planar structure. That is, it is changed to a structure without using a single crystal silicon wafer surface. The DRAM’s cell transistor is formed on the surface of etched silicon called the Buried Channel Array Transistor(BCAT), and the storage node of the capacitor is formed by erecting a cylinder-shaped pillar. This change forms more memory cells in a small area.

Not only has the structure changed into a cylinder shape, but as the material has also changed, the storage node and plate node of the cell capacitor were doped silicon, but now they are all metal(TiN). The dielectric film of the capacitor was also changed from SiO2 to ONO(SiO2/Si3N4/SiO2), and it has been changed to combinations of ZrOx, AlOx, HfOx. To maximize the capacity in a limited narrow area, the structure became a cylinder structure, the material was changed to metal and high-k material, and the cell capacitor arrangement was also transformed into a honeycomb structure(HCS) to secure the maximum area(Figure 2).

 

Figure 2. DRAM Cell Structure (a) Vertical view shows a cell transistor at the bottom and cylinder shape capacitor at the top. (Applied Materials) (b) This is the plane view of the honeycomb structure of a cell ([1] IEDM 2015-26.5).

Figure 2. DRAM Cell Structure (a) Vertical view shows a cell transistor at the bottom and cylinder shape capacitor at the top. (Applied Materials) (b) This is the plane view of the honeycomb structure of a cell ([1] IEDM 2015-26.5).

 

When reading stored data, the bit line(BL) and bit line bar(BLB) are compared. If the BL voltage is higher than the BLB, it becomes data 1, and if it is lower, it becomes data 0. The BLB becomes a standard point because it is not connected to the cell. Because the signal difference between BL and the BLB is small, it is amplified through the sense amplifier circuit to read data(Figure 3).

 

Figure 3. Sensing process of cell data a) Sense amplifier with a DRAM cell ([2] IEDM 2019-28.4). b) For DATA 1, BL is amplified to Vcc and BLB to Vss (0 V).

Figure 3. Sensing process of cell data a) Sense amplifier with a DRAM cell ([2] IEDM 2019-28.4). b) For DATA 1, BL is amplified to Vcc and BLB to Vss (0 V).

 

The signal is diminished by the parasitic capacitance of BL. Therefore, the BL’s parasitic capacitance should be small to increase the signal. For this, the dielectric material of the interlayer requires a low dielectric constant as opposed to the dielectric material of the capacitor. Because empty space has the lowest dielectric constant, an air spacer technology, or the gaps between bit lines, is used in extreme cases(Figure 4).

 

Figure 4. a) An air spacer is formed left and right of the bit line. b) A cross-sectional view of air spacer. c) The use of air spacers reduces the parasitic capacitance (Cb) of the bit line. ([1] IEDM 2015-26.5)

Figure 4. a) An air spacer is formed left and right of the bit line. b) A cross-sectional view of air spacer. c) The use of air spacers reduces the parasitic capacitance (Cb) of the bit line. ([1] IEDM 2015-26.5)

 

The DRAM is called a Random Access Memory(RAM) because it has cells with the orthogonal point of the word line and the bit line, allowing random access. Meanwhile, the DRAM has the advantage of being faster than flash memory, but it does not maintain a stored charge in the capacitor for a long time. Therefore, it should refresh reading and writing data again every 64 msec. Thus, it is called Dynamic RAM(DRAM). Therefore, when the power is turned off, the DRAM loses data, which is called volatile memory. On the other hand, the flash memory is nonvolatile because it maintains data even when power is turned off.

The size of DRAM cell is steadily decreasing like other semiconductor devices, and as the development for small feature size will be maintained in the future, but the rate is gradually slowing down because of technical difficulties. For example, if the size of the cell further decreases, manufacturing becomes difficult, and the current cylinder structure eventually changes to a pillar structure. This makes it more difficult to secure the cell capacitor area. As it is today, the requirements for high-k materials will become complicated, and overcoming the leakage current issue for high-k materials will be a great challenge.

Finally, it reached the limitations of structures and materials, and there is a possibility that a completely new structure may emerge rather than an extension of the current structure to overcome issues. For example, it can be transformed into a 3D structure that stacks DRAM cells.

 

[References]

[1] J. M. Park et al., “20nm DRAM: A new beginning of another revolution,” International Electron Device Meeting, 26.5-676 (2015)

[2] S. H. Jand et al., “A Fully Integrated Low Voltage DRAM with Thermally Stabe Gate-first High-k Metal Gate Process,” International Electron Device Meeting, 28.4-654 (2019)

 

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In-Ho Nam | Prof. Department Electronic Engineering, Hanyang University

 Author

 In-Ho Nam | Prof. Department of Electronic Engineering, Hanyang University

 ihnam@hanyang.ac.kr


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